Search results for "Index Terms—Traffic Collision"

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A Novel Architecture for Inter-FPGA Traffic Collision Management

2014

International audience; —with the increasing complexity of various communi-cations and applications, Network-On-Chip (NoC) is one of the most efficient communication structures. Multi-FPGA platforms are considered as the most appropriate experimental solutions to emulate a large size of MPSoCs (Multi-Processor System-on-Chip) based on a NoC. The deployment of the NoC into several FPGAs requires the use of inter-FPGA communication links. The number and performance of external links restrict the bandwidth of communication. Currently, the number of inter-FPGA signals is considered as a substantial problem in NoC implemented on Multi-FPGA architectures. In this paper, we propose the integration…

Routing protocolComputer sciencebusiness.industryBandwidth (signal processing)Inter-FPGACollision[INFO.INFO-ES] Computer Science [cs]/Embedded SystemsMulti-FPGASoftware deploymentHardware_INTEGRATEDCIRCUITSAlgorithm designResource management[INFO.INFO-ES]Computer Science [cs]/Embedded Systems[ INFO.INFO-ES ] Computer Science [cs]/Embedded SystemsbusinessField-programmable gate arrayIndex Terms—Traffic CollisionNoCCollision avoidanceComputer network
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